Performance Analysis of Factorization Quantum Algorithm in Simulator and Real Quantum Hardware

Quantum computing promises a disruption in problems of intractable complexity for classical architecture, notably integer factorization via Shor's Algorithm, whose scalability represents a paradigm shift for modern cryptography. However, the current NISQ (Noisy Intermediate-Scale Quantum) era imposes severe architectural restrictions due to physical decoherence and logical gate noise. This work presents an empirical performance analysis of Shor's Algorithm, contrasting execution in ideal local simulators with IBM Quantum’s physical processor ibm\_fez. Metrics of circuit depth, CNOT gate count, and success rates were evaluated for numbers 15, 21, 33, 35, and 55. Results reveal an exponential fidelity degradation as circuit complexity increases, highlighting the gap between algorithmic theory and current physical viability. It is concluded that practical application in cryptography remains limited by the high error rates of contemporary hardware, reinforcing the necessity of error correction codes for algorithm scalability in real systems.